基于IEEE 1500标准的模拟核外壳的设计  

Research on Wrapped Analog Cores Based on IEEE Std 1500

作　　者：颜学龙[1] 江志强[1] 柴华[1] 

机构地区：[1]桂林电子科技大学电子工程与自动化学院,广西桂林541004

出　　处：《计算机测量与控制》2012年第9期2536-2538,2545,共4页Computer Measurement &Control

基　　金：广西研究生教育科研创新项目(2010105950804M33)

摘　　要：在系统芯片SoC测试中,模拟核的可靠性测试是现在亟待解决的一个重要问题;针对此问题,主要对Wrapper测试壳结构进行设计,在此标准的基础上增加了AD和DA的转换器,既保留了原来应有的测试标准和方法,同时增加了用数字信号来测试模拟信号的方法;通过用Quartus II软件和PSpice软件的联合仿真下,证明了基于1500标准的外壳设计可以对模拟核进行测试。In the testing of system on chip （SoC）, the reliability testing of analog cores is an important question which is to be solved ur gently. In view of the question, this article mainly gives a design for the Wrapper architecture , and increases an AD and a DA switch based on the standard. The design not only retains the original test criteria and methods, but also increases another way, which is using the digital signals to testing the analog singals . The experiment results through the Quartus Ⅱ and the PSpice st, ow that the proposed test wrapper based on the IEEE 1500 Standard can test the analog cores.

关 键 词：模拟核 IEEE STD 1500 测试外壳 

分 类 号：TP206[自动化与计算机技术—检测技术与自动化装置]