一种基于FPGA的DDS系统设计方法研究  

Design of DDS system based on FPGA

作　　者：张岩[1] 李国林[2] 廖辉荣[3] 谢鑫[2] 田道坤[4] 

机构地区：[1]海军航空工程学院研究生管理大队 [2]海军航空工程学院七系 [3]中国人民解放军61255部队 [4]中国人民解放军91604部队

出　　处：《现代电子技术》2012年第17期75-77,82,共4页Modern Electronics Technique

摘　　要：以FPGA为硬件平台,通过具体计算确定了系统相关所有参数,介绍了一种DDS系统的详细设计方法,详细分析了DDS各个功能模块的设计流程,并给出部分仿真结果。依据此设计流程可扩展运用于不同的信号需求,具有一定的功能扩展性并已多次通过QuartusⅡ软件平台在FPGA上调试通过。调试结果证明,该方法可行有效,且产生信号具有精度高、频率变换快速、输出波形失真小等优点。A design scheme of DDS system is introduced based on the hardware platform of FPGA and the design process of each functional module is analyzed in detail. All the parameters for the system are determined through the exact caculations and simulation results of several modules are given. The system can be extended to the different signal requirments by changing parameters. The system is debugged based on Quartus II software platform and the results prove the feasibility of the system. And the signals produced by the proposed system have the advantages of high precision, fast frequency conversion and low output waveform distortion.

关 键 词：DDS FPGA VERILOG HDL 数字合成 

分 类 号：TN911.734[电子电信—通信与信息系统] TP274[电子电信—信息与通信工程]