Cell处理器访存特征研究  

The Memory Access Characteristics of the Cell Processor

作　　者：郑义[1] 邓林[1] 窦勇[1] 

机构地区：[1]国防科学技术大学计算机学院,湖南长沙410073

出　　处：《计算机工程与科学》2012年第11期72-76,共5页Computer Engineering & Science

基　　金：国家自然科学基金资助项目(60833004;60633050);国家863计划资助项目(2008AA01A201)

摘　　要：Cell处理器是一款异构多核处理器,拥有强大的计算能力。但是,在进行应用并行化时,却受到本地存储器容量、访存带宽和数据传输延时等的限制。DMA传输是隐藏长延时、提高存储带宽利用率的有效方法。本文在分析Cell处理器结构基础上,进行了一系列详细的DMA测试,并利用指数拟合技术得到DMA平均带宽模型,发现参与DMA传输的SPE数量和每次DMA传输规模是影响DMA访存带宽的主要因素。The Cell processor is a typical heterogeneous multi-core processor with powerful compu- ting ability. However, we are facing the challenges of ＇memory wall＇ in developing parallel applications, such as, limited capacity of local memory, limited memory bandwidth for multi cores and the large laten- cy for data communication. The DMA transfer mechanism is often used to hide the large latency and im- prove the utilization of memory bandwidth. In the paper, we start with a series of DMA experimental tests in the context of the Cell processor architecture, and perform mathematical analysis to setup a uni fled formula on the average bandwidth of DMA by means of exponential fitting, which describes that SPE amount and DMA block size take main effects on DMA bandwidth in quantity.

关 键 词：CELL 异构多核处理器 DMA 访存模型 

分 类 号：TP302.1[自动化与计算机技术—计算机系统结构]