一个低抖动比1GHz环形VCO的设计与实现  

Design and realization of a low jitter ratio 1 GHz ring VCO

作　　者：田颖[1] 徐江涛[2] 

机构地区：[1]天津大学仁爱学院信息工程系,天津301636 [2]天津大学电子信息工程学院,天津300072

出　　处：《电子技术应用》2012年第12期45-47,共3页Application of Electronic Technique

基　　金：国家自然科学基金项目(60806010)

摘　　要：通过对Weigandt模型进行噪声分析,采用一种改进的差分延迟单元结构,成功设计了一个稳定输出1 GHz的环形压控振荡器。同时,采用SMIC 0.18μm标准CMOS工艺流片,在输出端增加钳位管和正反馈管使输出电位能够快速转变为给定值,已达到高速振荡频率和较低噪声比的效果。流片后测试结果表明,当控制电压为30μV～800 mV时,输出频率可达740 MHz～1.3 GHz,并与输入电压之间呈现良好的线性性;在中心振荡频率为1 GHz时,噪声电压与信号电压的比满足设计要求。Based on the noise analysis of Weigandt model, an improved differential structure of delay cell is adopted to realize a 1 GHz ring VCO in SMIC 0.18 um standard CMOS process. The clamping diode and positive feedback transistors are added at the output, so the output voltage transits faster to fixed swing. Therefore, the high speed oscillating frequency is achieved while low jitter ratio is guaranteed. The testing result after tape-out shows when control voltage ranges from 30 uV to 800 mV, the output frequency shows good linearity with range from 740 MHz to 1.3 GHz, while the jitter voltage to signal voltage at central 1 GHz is acceptable for the application.

关 键 词：压控振荡器 锁相环 抖动比 CMOS工艺 

分 类 号：TN47[电子电信—微电子学与固体电子学]