覆盖率驱动的芯片功能验证设计与实现  

Design and implementation of coverage-driven chip function verification

作　　者：罗莉[1] 何鸿君[1] 窦强[1] 徐炜遐[1] 

机构地区：[1]国防科学技术大学计算机学院,湖南长沙410073

出　　处：《计算机工程与科学》2013年第1期36-40,共5页Computer Engineering & Science

摘　　要：随着芯片集成度的发展,芯片性能越来越高,而上市时间越来越短,芯片验证在芯片设计中非常关键并贯穿于整个设计过程,验证的效率和质量直接决定着芯片的成败。提出了基于覆盖率驱动的芯片功能验证方法,定义了基于功能点覆盖率驱动的验证流程,利用PSL语言描述断言检查很有效,通过模拟工具检查断言是否成功,从而判断设计是否满足系统的功能要求。在网络接口芯片实际应用中,有效地降低了验证工作的复杂度,同时提高了验证的速度和质量。利用功能覆盖率数据判断测试激励的正确性和完整性,同时用覆盖率数据定量评价验证进程,提高了整个设计的效率。With the development of integrated circuit technology, chip performance is increasing, time to market is becoming shorter, chip verification is a key component of the chip design and is used in the entire design process, so the efficiency and quality of verification directly determines the success or failure of the chip. The design and implementation process of coverage-driven function verification is presented, it is more efficient to use PSI. languages designed as assertion monitors to describe system behavior, the simulator tests these assertion monitors, and generate warnings or errors if an assertion fails, monitors will quickly identify when the protocols or sequences of signals are incorrect. This ap- proach is used in a network interface chip design. It reduces the complexity, and improves the speed and quality of verification. Coverage dates are used to estimate the verification process, integrality and cor- rectness of test bench, this method increases the design efficiency.

关 键 词：覆盖率驱动 功能验证 PSL SYSTEMVERILOG 

分 类 号：TP302[自动化与计算机技术—计算机系统结构]