基于FFT的泊松方程快速求解器的硬件实现  

Hardware Implementation of Fast Poisson Solver based on FFT

作　　者：李国燕[1] 顾军华[2] 宋庆增[3] 陆益财[2] 周博君[2] 

机构地区：[1]河北工业大学电气工程学院,天津300130 [2]河北工业大学计算机科学与软件学院,天津300130 [3]天津工业大学计算机科学与软件学院,天津300387

出　　处：《计算机测量与控制》2013年第1期250-253,共4页Computer Measurement &Control

基　　金：天津市应用基础及前沿技术研究计划项目(10JCYBJC00200)

摘　　要：针对传统的泊松方程求解算法执行效率低、功耗大,很难满足实际需要的缺点,设计了一种FPGA硬件平台的泊松方程快速求解器。设计采用软件与硬件结合的方式,由软件执行控制复杂、计算量较小的任务,而由硬件完成控制简单、计算量大的任务,从而达到硬件加速的目的。在FPGA平台上,独立设计的FFT协处理器可以流水和高度并行化的处理数据,提高了求解器的性能。实验结果表明,硬件实现的基于FFT的泊松方程快速求解器具有较高的计算性能和良好的可扩展性。The traditional poisson solver is low efficiency and high power dissipation, it is difficult to meet the actual needs, this paper proposes a hardware design of poisson solver based on FPGA platform. In order to achieve the purpose of hardware acceleration, the design is based on hardware/software co--design. The code which including complexity control and less calculation is performed by the software part and the hardware part implements the code of enormous computation and simple control. In this paper, we design and implement a FFT co processor on FPGA, it can pipeline and highly parallel process data. Final results illustrate that the hardware implementation of fast poisson solver based on FFT has high computing performance and good scalability.

关 键 词：泊松方程 FFT FPGA 快速求解器 

分 类 号：TP302[自动化与计算机技术—计算机系统结构]