基于异步映射的异步流水线设计  

Pipeline Design Based on Asynchronous Mapping

作　　者：孙赛赛[1] 王兵[2] 黄东安 

机构地区：[1]泰山医学院信息工程学院,泰安271016 [2]上海交通大学微电子学院,上海200240 [3]国网技术学院信息通信培训部,泰安271000

出　　处：《计算机与数字工程》2013年第2期275-278,286,共5页Computer & Digital Engineering

摘　　要：论文提出了"异步映射"的概念,即在传统同步流水线基础上,试图将控制部分和数据计算部分分离,将控制部分用优化的异步电路替换,得到兼具异步和同步电路优点的流水线结构。论文首先证明了基于锁存器的流水线在同步时钟和异步流水线控制下能够获得相近的性能和完全相同的结果,然后以"异步映射"的方法实现了一款基于锁存器的16位异步DSP的设计。通过对DSP的性能进行分析,"异步映射"的可行性得到了验证。"异步映射"也可以被应用于基于寄存器的流水线和复杂流水线结构,达到利用同步设计的丰富资源发挥异步设计长处的目的。This paper proposes a concept named asynchronous mapping,which is in the basis of traditional synchronous pipeline,control unit and data path are separated each other,then a pipeline architecture which combines the metrics of asynchronous circuits and synchronous pipelines is created by replacing the control unit with asynchronous circuits.This paper will first verify the theory that almost the same performance and completely the same results can be get from latch-based pipelines controlled by synchronous clocks and asynchronous pipelines,then a 16-bit asynchronous DSP will be designed with asynchronous mapping.Results from DSP will prove the validity of asynchronous mapping.The methodology named asynchronous mapping can also be used for flip-flop based pipelines and complex pipelines,to get benefits asynchronous design can bring with the rich resources of synchronous design.

关 键 词：异步映射 流水线 异步电路 一致性 替换 

分 类 号：TN4[电子电信—微电子学与固体电子学]