OFDM发射机设计与FPGA实现  

Design of OFDM transmitter and its FPGA implementation

作　　者：周瑜[1] 邵凯[1,2] 蒋漓[1] 庄陵[1,2] 王光宇[1,2] 

机构地区：[1]重庆邮电大学通信与信息工程学院,重庆400065 [2]移动通信技术重庆市重点实验室,重庆400065

出　　处：《光通信研究》2013年第1期42-45,共4页Study on Optical Communications

基　　金：国家自然科学基金资助项目(61071195);中芬国际合作项目(1028)

摘　　要：为使OFDM(正交频分复用)技术在宽带无线通信中得到实际运用,提出了基于IEEE 802.11a协议的OFDM发射机的设计方案及关键技术的实现方法。在设计中采用自顶向下的设计思想,通过数字锁相环、乒乓RAM(随机存储器)等方式提高系统运行的可靠性。并利用Altera公司的Cyclone IV E系列FPGA(现场可编程门阵列)器件的特点和灵活的IP Core(知识产权核)功能,实现了OFDM发射机的设计。在Modelsim环境下的仿真结果证明了该设计的有效性,且占用的资源少。For the practical applications of the OFDM technology in broadband wireless communications, an OFDM transmitter design scheme based on IEEE 802.11a protocol and the implementation of its key technologies are proposed. In the design, the top-down design idea is adopted and by using the digital Phase Locked Loop （PLL） and ping-pong RAM, the system operational reliability is improved. Finally, by using the characteristics of Altera Cyclone IV E series FPGA devices and flexible IP Core functions, the transmitter OFDM design is implemented. Simulation results in the Modelsim environment indicate that this design is effective and occupies less resource.

关 键 词：正交频分复用 数字锁相环 知识产权核 

分 类 号：TP302.1[自动化与计算机技术—计算机系统结构]