一款应用于电能计量芯片中的∑-Δ调制器设计(英文)  

Design of a ∑-ΔModulator for Energy Meter IC

作　　者：郎伟[1] 林平分[2] 陆游[2] 万培元[2] 

机构地区：[1]北京工业大学计算机学院,北京100124 [2]北京工业大学电子信息与控制学院,北京100124

出　　处：《半导体技术》2013年第3期168-172,共5页Semiconductor Technology

基　　金：Project supported by the National Natural Science Foundation of China(61204040)

摘　　要：提出了一款低功耗、大动态范围输入的sigma-delta(∑-Δ)调制器设计。调制器采用前馈结构与一比特量化器,前馈结构降低了系统对积分器内运算放大器线性度以及转换速率的需求。积分内的运算放大器采用两级运放来满足大摆幅输出和高线性度性能要求。通过蒙特卡洛仿真分析验证,该两级运放在不同工艺角下具有良好的增益线性度性能。∑-Δ调制器整体电路在0.18μm CMOS工艺下实现,面积为0.23 mm2。后仿结果显示,在采用1.8 V电源电压供电,5 kHz,1.4 V峰-峰值正弦波输入信号,14 kHz信号带宽,过采样倍数为512的条件下,该调制器可以达到87 dB信噪失真比,整体电路消耗的电流为530μA。The design of a low power high swing sigma-delta modulator for energy metering integrated circuits was presented. The modulator employed an input feed-forward topology and a one bit quantizer. The feed-forward architecture relaxed the linearity and slew rate requirements on amplifiers. A two-stage operational amplifier was utilized in the integrator to meet high swing and high linearity requirements. The amplifier gain linearity has good immunity to process variations, which was verified by Monte Carlo analysis. The circuits were designed and simulated in 0. 18μm CMOS process. The active area is 0.23 mm2. Post-simulation results show a peak signal to noise and distortion ratio （SNDR） of 87 dB for a 14 kHz signal bandwidth at 5 kHz input. The simulated overall current dissipation is 530 p,A with a 1.8 V supply voltage at a 512 oversampling rate.

关 键 词：SIGMA-DELTA调制器 斩波稳定电路 开关电容电路 电能计量 互补金属氧化物半导体 

分 类 号：TN761[电子电信—电路与系统]