用于射频接收机的三阶多级Σ-Δ调制小数分频频率合成器的实现  

Design of a Fractional-N Frequency Synthesizer with Third-Order MASH Sigma-Delta Modulator for RF Transceivers

作　　者：王皓磊[1] 仲顺安[1] 李国峰[1] 

机构地区：[1]北京理工大学信息与电子学院,北京100081

出　　处：《北京理工大学学报》2013年第3期307-310,317,共5页Transactions of Beijing Institute of Technology

基　　金：国家自然科学基金资助项目(60976025)

摘　　要：基于TSMC 0.18μm工艺实现了一款适用于射频收发机的全集成小数分频频率合成器.设计中采用了三阶MASH结构Σ-Δ调制器以消除小数杂散,为节省芯片面积使用了环形振荡器,同时在电路设计中充分考虑了各种非理想因素以提高频谱纯净度和降低芯片功耗.仿真结果表明,该频率合成器可以在900MHz～1.4GHz的频率范围内产生间隔为25kHz的输出信号.在1.2GHz输出时,偏离载波频率1MHz处的相位噪声可以达到-106dBc/Hz,锁定时间小于10μs.This paper presents a ring oscillator based fully integrated fractional-N frequency synthesizer suit for RF transceiver. MASH11-1-∑-△ modulation is implemented to randomize the fractional spur. Spectrum purity and power consumption is also considered during the circuit design. The synthesizer was implemented in TSMC 180 nm CMOS. The results indicate that 25 kHz frequency resolution could be achieved at a range of output frequency from 900 MHz to 1.4 GHz. When output frequency is 1.2 GHz, the phase noise is -106 dBc/Hz at 1 MHz offset and the settling time is 10μs below.

关 键 词：小数分频 多级整形Σ-Δ调制器 环形振荡器 双模预分频器 

分 类 号：TN453[电子电信—微电子学与固体电子学]