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作 者:陈波[1] 丁荣峥[1] 明雪飞[1] 高娜燕[1]
机构地区:[1]中国电子科技集团公司第58研究所,江苏无锡214035
出 处:《电子与封装》2012年第11期9-12,共4页Electronics & Packaging
基 金:国家"核高基"重大专项(2011ZX01022-004)
摘 要:大功率或高功率密度的高可靠集成电路等通常采用合金焊料焊接芯片,以降低封装热阻和提高芯片焊接的可靠性。合金焊料焊接方式主要有真空烧结、保护气氛下静压烧结、共晶摩擦焊等。不同焊接工艺有其不同的适应性和焊接可靠性。文章以高可靠封装常用金基焊料的共晶焊接为例,探讨在相同封装结构、不同共晶焊接工艺下焊接层孔隙率,以及相同工艺设备、工艺条件下随芯片尺寸增大孔隙率的变化趋势。研究结果表明:金-硅共晶摩擦焊工艺的孔隙率低于金-锡真空烧结工艺和金-锡保护气氛静压烧结;同一焊接工艺,随着芯片尺寸变大,其孔隙率变化不显著,但单个空洞的尺寸有明显增大趋势。Alloy solder slice is widely used in the package of IC devices with high power or high power density. Generally, these IC devices are called for high reliability which is realized by the use of alloy solder slice, while it decreases the heat resistance oflC package. The widely used processes for alloy soldering are soldering in vacuum, soldering in protecting gas same as atmospheric pressure, jointing with eutectic scrub, etc. These processes vary in soldering reliability and are employed in different conditions according to different demands. It is reported that how the eutectic soldering process and chip size influence the void rate of Au-based alloy. Researches show that,void rote ofAu-Si eutectic scrub bonding is lower than Au-Sn alloy jointing in vacuum and Au-Sn alloy jointing in protecting gas; void rote does not but the size of single void does obviously change as chip size increases.
分 类 号:TN305.94[电子电信—物理电子学]
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