前导1预测算法的设计与实现  被引量:5

Design and Implementation of Leading-One Prediction

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作  者:李星[1] 胡春媚[1] 李勇[1] 李振涛[1] 

机构地区:[1]国防科技大学计算机学院,长沙410073

出  处:《计算机科学》2013年第4期31-34,50,共5页Computer Science

基  金:国家自然科学基金(60906014)资助

摘  要:前导1预测(Leading One Prediction,LOP)算法常被用在浮点数的加减运算中,它能与尾数加法器并行工作,从而加快了尾数加法器计算结果的规格化过程,同时,这种方法会带来最多1位的误差。根据对误差的处理方式不同,将预测算法分成了3类,并详细介绍了其中的串行纠错前导1预测算法的具体结构,对其关键的组成部分在算法上进行了选择和优化。它与并行纠错LOP以及传统前导1检测(Leading One Detector,LOD)的逻辑综合的实验结果表明,该算法取得了面积、功耗和延时之间的较好均衡。在实际的应用中,该算法成功地运用在了工作频率为1GHz的三站式双通路(Two-Path)浮点加法器中。Leading-one prediction(LOP),which is often used in floating-point addition/subtraction,can operate in parallel with the adder and reduce the delay in the normalization shift.However,this prediction might generate one-bit-error.Three different LOP architectures were classified by the methods handling the one-bit-error.Among that,the LOP architecture with serial correction was described in detail.At the same time,serial correction's key components in the algorithms were optimized.Through the synthesis experiments of LOP architecture with concurrent correction,serial correction and traditional leading one detector(LOD) method,we found that serial correction method has the best performance balancing area,power and delay.It is successfully used in two-path floating-point adder which is operated in 3-cycle pipeline with a 1Ghz clock frequency.

关 键 词:前导1预测 前导1检测 纠错 规格化 

分 类 号:TP303[自动化与计算机技术—计算机系统结构]

 

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