片上互连中Pre-emphasis电路的研究  

Research of Derive Pre-emphasis Techniques for On-Chip Global Buses

作　　者：楼媛[1] 蒋剑飞[1] 毛志刚[1] 

机构地区：[1]上海交通大学微电子学院,上海200240

出　　处：《微电子学与计算机》2013年第5期87-91,共5页Microelectronics & Computer

摘　　要：随着SOC的发展,单个芯片上集成的内核越来越多,片上系统的复杂化对片上互连线的传输带宽以及可靠性提出了更高的要求.基于传输均衡原理的pre-emphasis技术通过在数据的发送端加强信号高频分量,衰减低频分量,能够有效地提高互连带宽,消除码间干扰.Pre-emphasis电路结构中的延时对电路性能有着很大的影响.通过对传输函数进行拉普拉斯变换,从理论上分析出存在使电路性能最佳的最优延时,该延时与信道的RC参数有关.基于SPICE的电路仿真表明,经过优化的pre-emphasis电路能够更有效地提高传输带宽,实现片上互连的高速传输.With the development of System--on--chip designs, more and more functionality is integrated into a single chip. The complexity of the system on a chip demands a higher requirement of onchip interconnect bandwidth and reliability. The driver pre-- emphasis architecture based on transmitter equalization techniques can effectively improve the interconnect channel bandwidth and eliminate inter--symbol interference hy emphasizing the high--frequency components while attenuating low--frequency components. The delay in pre--emphasis circuit structure has a significant impact on circuit performance. In this paper, we analyze the existence of optimal delay which is related to the RC parameter of the channel by means of Laplace transform. The result of spice simulation show that the optimized pre- emphasis circuit can improve the transmission bandwidth more effectively, thus achieving high--speed on--chip data transmission.

关 键 词：PRE-EMPHASIS 驱动电路 高速 片上系统 

分 类 号：TN402[电子电信—微电子学与固体电子学]