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出 处:《现代电子技术》2013年第10期59-61,66,共4页Modern Electronics Technique
摘 要:为了得到比传统片上网络的网络资源接口(NI)更高的数据传输效率和更加稳定的数据传输效果,提出了一种新的高效网络接口的设计方法,并采用Verilog HDL语言对相关模块进行编程,实现了高效传输功能,同时又满足核内路由的设计要求。最终通过仿真软件Xilinx ISE Design Suite 12.3和ModelSim SE 6.2b得到了满足设计要求的仿真结果。In order to achieve more higher data transmission efficiency and more stable data transmission effect of the net- work interface on NOC than those of the traditional NOC, a new of design method of high efficiency network interface is pro- posed. The relative modules were programmed with Verilog HDL language. The high efficiency transfer function of the interface was implemented. The design requirement of the router integrating in core was satisfied. The simulation results which met the de- sign requirement were finally obtained with the simulation softwares Xilinx ISE Design Suitel2.3 and Modelsim SE 6.5.
关 键 词:片上网络 网络资源接口 核内路由 VERILOG HDL
分 类 号:TN911.34[电子电信—通信与信息系统]
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