Camera Link在Virtex5系列FPGA上的实现  

Implementation of Camera Link on Virtex-5 FPGA

作　　者：王钢[1,2] 王世刚[3] 刘财[1] 高凯[3] 

机构地区：[1]吉林大学地质探测科学和技术学院,吉林长春130022 [2]北华大学电气信息工程学院,吉林吉林132012 [3]吉林大学通信工程学院,吉林长春130012

出　　处：《山东大学学报（工学版）》2013年第2期1-5,共5页Journal of Shandong University（Engineering Science）

基　　金：国家自然科学基金重点资助项目(U0935001);吉林省科技发展计划资助项目(20090506);吉林省科技发展计划资助项目(20100306)

摘　　要：针对当前工业相机和图像采集卡Camera Link标准接口需要使用专用集成电路才能实现的问题,提出采用最新Xilink的Virtex5系列现场可编程门阵列(field programmable gate array,FPGA),使用甚高速集成电路硬件描述语言(very high speed integrated circuits hardware description language,VHDL)编程实现Camera Link的信道链路解串器和帧获取器的逻辑时序和信号控制电路。通过Camera Link接口信号的误码率测试和采集信号的完整性实验,验证了系统设计原理的正确性和在高误码率条件下,正常采集图像的可靠性。因此本系统设计可以在相同系列FPGA之间进行有效的系统资源移植,简化硬件电路设计,节约一半以上的开发时间,提高大约75%的系统集成度。In order to solve the problem that Camera Link standard interface used by the current industrial camera and the image acquisition card realized only by making use of special integrated circuit,the field programmable gate array（FPGA） of Virtex5 series—the latest product of Xilink was used,and the very high speed integrated circuits hardware description language（VHDL） programming was also used to realize the logical sequence and signal control circuit of the Channel Link deserializer and the Frame Grabber on the Camera Link interface.Based on the bit error rate test and the integrity test of signal acquisition on at Camera Link interface,it was verified that the principle of system design was correct and the acquiring normal image in the condition of high bit error rate was reliable.After applying designs of this system,the resource transplantation was processed more effectively among the same series of FPGA,the hardware circuit was simplified,the development time was saved by more than 50%,and the integration of the system by 75% increased.

关 键 词：CAMERA LINK Virtex5 信道链路 帧获取器 现场可编程门阵列 

分 类 号：TG156[金属学及工艺—热处理]