基于VHDL的QPSK调制解调系统设计与仿真  

QPSK modulation and demodulation system design and simulation based on VHDL

作　　者：周泽湘[1] 徐运武[1] 

机构地区：[1]广东松山职业技术学院电气工程系,广东韶关512126

出　　处：《电子设计工程》2013年第9期89-90,94,共3页Electronic Design Engineering

摘　　要：文中详细介绍了QPSK技术的工作原理和QPSK调制、解调的系统设计方案,并通过VHDL语言编写调制解调程序和QuartusⅡ软件建模对程序进行仿真,通过引脚锁定,下载程序到FPGA芯片EP1K30TC144-3中验证。软件仿真和硬件验证结果表明了该设计的正确性和可行性,由于采用FPGA芯片,减小了硬件设计的复杂性,该设计具有便于移植维护和升级的特点。This paper introduces the working principle of QPSK technology, and introduces the QPSK modulation and demodulation system design scheme. Write modulation and demodulation program with VHDL language, and simulate through the QuartuslI modeling software ,and download the program to FPGA chip EP1K30TC144-3 through the pin locking. The software simulation and hardware verification results that the validity and feasibility of the design. Since using FPGA chip, which can reduce the hardware design complexity, this design can be transplanted, maintained and upgraded very easy.

关 键 词：VHDL QPSK FPGA QuartusⅡ 

分 类 号：TM914.6[电气工程—电力电子与电力传动]