一种兼容AHB总线的Nor Flash控制器IP设计  

Design of a Nor Flash Controller IP Compatible AHB Bus

作　　者：田鹏[1,2] 聂泽东[2,3] 张正平[1] 王文丞[2,3] 王磊[2,3] 

机构地区：[1]贵州大学理学院,贵州贵阳550025 [2]中国科学院深圳先进技术研究院,广东深圳518055 [3]深圳市低成本健康重点实验室,广东深圳518055

出　　处：《微电子学与计算机》2013年第6期88-91,96,共5页Microelectronics & Computer

基　　金：国家"九七三"计划项目(2010CB732606);贵阳市科技计划项目(筑科合同[2011204]34号);国家自然基金项目(60932001;61072031)

摘　　要：为满足医学系统芯片(SOC)的低成本、低功耗、微型化的需求,定制了一款兼容AHB总线接口的NorFlash控制器IP.该设计针对常规Flash控制器功能繁杂,读写数据需长时间等待等缺点,采用了硬件解锁、简化块擦除模块和增加写操作数据寄存器等优化设计方法.该设计最后进行了FPGA原型验证并进行了流片,验证测试结果表明,该IP功能正确,总线的利用率得到了提高.在系统时钟10MHz下,选用S29L V008J Nor Flash芯片,按连续存储16个32位数据计算,本设计比常规设计减少总线占用时间165μs,设计达到了预期结果.To meet the demand for low power, low-cost and miniaturization of the medical system-on-chip （SO（2）, a AHB bus compatible Nor Flash controller IP was designed. The optimal design methods of simplifying the sector erase module, increasing the write data register and hardware unlock were adopted to overcome the disadvantageous of conventional Flash controller, such as the complicated logical design, long waiting time for reading and writing. The design was verified by FPGA and taped out finally, the verified results show that the function of the IP was correct and the bus utilization has been improved. When the system ran at 10MHz and the S29LV008J chip was selected, the bus utilization time was reduced 165μs when sixteen 32 bit data were stored continuously.

关 键 词：AHB总线 NOR FLASH 控制器 IP 

分 类 号：TP315[自动化与计算机技术—计算机软件与理论]