基于FPGA的计算机系统接口实验平台的设计与研制  

Design and development of a computer interface experimental platform bawd on advanced FPGA

作　　者：周悦芝[1] 董代洁[1] 

机构地区：[1]清华大学计算机科学与技术系,北京100084

出　　处：《实验技术与管理》2013年第5期70-73,86,共5页Experimental Technology and Management

摘　　要：介绍了一种以新型FPGA为主芯片的计算机系统接口实验平台的设计与研发。由于新的FPGA扩大了片内逻辑密度,内嵌了高速收发器、PCIe核及DSP处理片等[1],并且与之配套的设计软件也具备了逻辑设计、嵌入式开发、与Matlab绑定设计、仿真调试以及软硬件协同工作的功能,使得该实验装置扩大了接口设计的能力,除了可以采用普通的逻辑方式设计硬件接口以外,还可以采用可编程片上系统(SOPC)方法设计系统一级的硬件接口,同时增加了DSP信号处理方面的内容。该实验装置用于教学实验后能够使学生接触到国际上领先技术的设计方法,使实验教学的内容接近于社会实际需求。This paper describes the design and development of a computer interface experimental platform based on the recent FPGA. The new type of FPGA features increased logic density, embedded high-speed transceivers, PCIe core, and DSP processing piece. Its software tools can support logic design, embedded development, Matlab binding, simulation, debugging, and co-design of hardware and software. Therefore, the experimental platform can expand the interface design capabilities. Not only the hardware interface in logical way and system in programmable chip （SOPC） with this platform can be designed, but also the experiments of the DSP signal processing can be done. After the experimental platform is used for teaching, the students can learn the international leading hardware design technologies, so that the contents of the teaching experiments are close to the actual needs of the industry.

关 键 词：接口实验平台设计 VHDL FPGA EDK 可编程片上系统 

分 类 号：TP302[自动化与计算机技术—计算机系统结构]