芯片制作过程中切割道光刻对准标记的优化  

Optimization of Scribe Lane Photo Alignment Mark for Semiconductor Manufacturing

作　　者：刘丽丽 王永刚 胡惠娟 

机构地区：[1]中芯国际集成电路制造(上海)有限公司,上海201203

出　　处：《电子与封装》2013年第6期18-20,42,共4页Electronics & Packaging

摘　　要：在0.18μm高压产品工艺生产过程中,作者发现晶片在钨化学机械研磨制程后会有很严重的钨剥落缺陷,此种缺陷成行排列,有一定规律,与光罩的曝光间隔距离相匹配,该缺陷会导致产品良率有非常明显的下降。同时在生产过程中也发现在MIM上极板蚀刻后,有些聚合物难以去除,此种残留物也来自曝光的固定位置。因此解决这类与光罩相关的缺陷和残留物显得尤为重要。作者经过深入的研究分析以及实验验证,通过对切割道上的光罩对准标记进行优化,彻底解决了这两种缺陷问题,使得产品的良率得以提升。Some 0.18υm HV products suffered worse W peeling defect by row. The interval between two rows is matching with shot distance. At the same time, some 0.18υm HV products with MIM capacitor suffered polymer residue defect issue after MIM wet strip. The polymer residue also came from fixed location of shot. So it is very important to solve these kinds of shot related defects. In this paper, a study of removing the shot related defects is presented. By optimization of Via photo alignment Mark, the two kinds of defects can be removed completely. And this solution not only can improve yield, but not would make inline processing control easily.

关 键 词：半导体技术 缺陷 光刻对准标记 

分 类 号：TN305.7[电子电信—物理电子学]