改进的三维剪裁算法及其硬件设计  

Improved Algorithm for 3D Clipping and Its Hardware Design

作　　者：邓惠子[1] 韩俊刚[1] 马超[1] 杨婷[1] 查理[1] 

机构地区：[1]西安邮电大学专用集成电路中心,陕西西安710061

出　　处：《电子科技》2013年第7期1-3,6,共4页Electronic Science and Technology

基　　金：国家自然科学基金重点资助项目(906070008)

摘　　要：针对图形处理器中经典的三维裁剪算法中的冗余操作以及双线性插值的一次多余计算,提出一种改进的裁剪算法,即利用多边形的几何关系使用多边形的顶点坐标和其内部一点的坐标,计算坐标之间的比例系数,进而用系数进行属性插值。仿真结果表明,改进的裁剪算法可以实现减少计算量,并提高硬件电路的效率。In view of the redundant operations of the three-dimensional clipping by classical algorithm in graph- ics processor unit and the unnecessary calculation in bilinear interpolation, the article proposes an advanced clipping algorithm, which uses the geometric relationship between the polygon and the vertex inside to calculate the coefficient of the coordinates, and then interpolate the attributes of the point. The simulation results show that the advanced clipping algorithm can reduce the amount of calculation and improve the efficiency of the hardware circuit.

关 键 词：图形处理器 三维剪裁 双线性插值 

分 类 号：TP391.41[自动化与计算机技术—计算机应用技术]