一种多路实时语种识别系统设计与实现  

Research on memory access mechanism based on embedded system

作　　者：陈学梁[1] 常振超[1] 杨镇西[1] 张丽[1] 

机构地区：[1]国家数字交换系统工程技术研究中心,郑州450002

出　　处：《计算机应用研究》2013年第7期2041-2043,共3页Application Research of Computers

基　　金：国家"863"计划基金资助项目(2009AA012201)

摘　　要：对语种识别系统的算法运算量和复杂度进行分析可知:其前端特征提取和预处理部分运算量较小,且算法相对灵活;而后端建模分类部分算法运算量较大且算法相对稳定,是系统实现大规模并行处理的瓶颈。基于此,提出了一种DSP+FPGA的系统实现架构,对前端特征提取采用浮点DSP进行算法实现,而后端则采用FPGA设计进行算法实现,并对系统进行了性能测试和资源分析,验证了设计的合理性。On the language identification system algorithm and complexity of the analysis： the front end feature extraction and preprocessing part of less calculation amount,and the algorithm is relatively flexible;and back-end modeling algorithm computation and the algorithm is relatively stable,the system is realized large-scale parallel processing bottleneck.Based on this,this paper proposed a DSP＋FPGA system architecture,it designed the front end feature extraction using floating point DSP algorithm,and designed the rear end using FPGA algorithm implementation.The system performance test and analysis of resource verify the rationality of the design.

关 键 词：多路实时 语种识别 FPGA 并行处理 

分 类 号：TP391[自动化与计算机技术—计算机应用技术]