电感及电容结构的压控振荡器电路设计与仿真  

Design and simulation of LC voltage-controlled oscillator

作　　者：梁爽[1] 赵伟光[1] 王峻[1] 

机构地区：[1]空军工程大学理学院,陕西西安710051

出　　处：《西安科技大学学报》2013年第4期450-454,共5页Journal of Xi’an University of Science and Technology

基　　金：军内科研重点资助项目(KJ2011148)

摘　　要：随着通信技术对射频收发机性能要求的不断提高,高性能压控振荡器已成为模拟集成电路设计、生产和实现的关键环节。针对压控振荡器设计过程中存在相位噪声这一核心问题,文中采用STMC 0.18μm CMOS工艺,提出了一种1.115 G的电感电容压控振荡器电路设计方案,利用Cadence中的Spectre RF对电路进行仿真。研究结果表明:在4～6 V的电压调节范围内,压控振荡器的输出频率范围为1.114 69～1.115 38 GHz,振荡频率为1.115 GHz时,在偏离中心频率10kHz处,100 kHz处以及1 MHz处的相位噪声分别为-90.9 dBc/Hz,-118.6 dBc/Hz,-141.3dBc/Hz,以较窄的频率调节范围换取较好的相位噪声抑制,从而提高了压控振荡器的噪声性能。With the rapid improvement of the communication technology of RF transceiver, high perform- ance voltage-controlled oscillator has been a key link of analog integrated circuit design, production and implementation. Focusing on the problem of phase noise ,design method of 1 . 115 GHz LC VCO is pro- posed in TSMC 0.18μm CMOS process. The circuit is simulated by the SpectreRF in Cadence. The simulation results show that the VCO voltage adjustment range is 4V to 6V, and output frequency range is 1. 114 69 GHz to 1. ll5 38 GHz. Phase noise at an offset of l0 kHz,100 kHz and 1 MHz are -90.9, -118.6 and -141.3 dBc/Hz,respeetively. In order to enhance the VCO noise performance,the paper＇s purpose is as much as possible to exchange narrow frequency for good phase noise.

关 键 词：压控振荡器 CADENCE SpectreRF 相位噪声 

分 类 号：TN402[电子电信—微电子学与固体电子学]