电网谐波背景下单相并网逆变器的锁相方法  

Phase-locked Loop for Single Phase Grid-connected Inverters in a Harmonic Distorted Grid

作　　者：王鹿军[1] 张冲[1] 吕征宇[1] 

机构地区：[1]电力电子技术国家专业实验室,浙江大学,浙江省杭州市310027

出　　处：《电力系统自动化》2013年第14期107-112,共6页Automation of Electric Power Systems

基　　金：国家自然科学基金资助项目(51177148)~~

摘　　要：针对分布式电源接入的配电网因临近非线性负载而含有大量低次谐波的问题,提出了一种适用于单相并网逆变器的锁相方法。该方法的核心是一个由主模块和多个谐波模块组成的交错耦合反馈结构,其中主模块是依据梯度下降法来估测基波幅值频率的锁相环(AFPLL),谐波模块是简单的二阶陷波滤波器(NF)。该复合结构可有效消除传统锁相方法在处理畸变电压信号时存在的稳态误差。分别通过畸变电压锁相实验、相位突变实验、幅值突变实验和频率突变实验,评估了该锁相方法的稳态和动态性能。实验结果表明,所提出的锁相方法不但在电压信号严重畸变时具有较高的锁相精度,而且在电压信号发生突变时也具有较快的响应速度。Based on the fact that the grid voltage of distribution network with distributed generators connected usually contains low order harmonics caused by adjacent nonlinear loads, a phase-locked loop （PLL） structure is proposed for single phase grid- connected inverters. The proposed method has a coupling feedback structure composed of a main module and multi notch filters, in which the main module aims to estimate fundamental component and multi notch filters aim to get harmonic components. The main module is an amplitude-frequency-phase-locked loop （AFPLL） using gradient descent method. The harmonic modules are simple second order notch filters （NFs）. The complex structure can eliminate steady state errors in dealing with harmonic distorted grid voltage. Finally, the proposed PLL is verified by harmonic distorted grid voltage synchronization experiment, phase mutation experiment, amplitude mutation experiment and frequency mutation experiment. The experimental results show that the proposed PLL not only can eliminate steady state error in harmonic distorted grid voltage, but also has a quick response when grid voltage suddenly changes.

关 键 词：分布式电源 并网逆变器 锁相环 谐波 梯度下降法 陷波器 

分 类 号：TM464[电气工程—电器]