嵌入式存储器的通用SystemC模型设计  

A Generic Embedded Memory Model Using SystemC

作　　者：妙维[1] 李国宏[1] 章琦[1] 汪辉[1] 

机构地区：[1]中国科学院上海高等研究院,上海201210

出　　处：《微电子学与计算机》2013年第7期33-36,共4页Microelectronics & Computer

基　　金：国家重大科技专项(2011ZX02505-002);上海市科委项目(10DZ1500600)

摘　　要：本文提出了一个基于SystemC的通用存储器模型,可以作为构造SoC的通用IP模型.该模型采用统一的事务级接口,内部控制逻辑和存储器构成采用时钟精准的模型,并且提供了一系列配置参数用来反映影响性能的带宽、延时、以及仲裁机制.该模型成功预测了一个视频解码器中共享SRAM所采用bank数量对性能的影响.This paper proposes a novel generic memory model written in SystemC as a generic SystemC IP.The model has unified transaction-level interface,while the internal controlling logic and memory organization are cycle-precision.There are subtle parameters to configure the model so that the bandwidth,latency and arbitration rule can be controlled to explore design space.The model has successfully predicted the performance loss caused by a shared memory in a video decoding hardware design when the number of banks to build the memory changes.

关 键 词：SYSTEMC 建模 存储器 SOC 

分 类 号：TN402[电子电信—微电子学与固体电子学]