基于FPGA的QDPSK全数字通信电路的设计与实现  

Design and Realization of the QDPSK Digital Communication Circuit Based on FPGA

作　　者：高雨晨[1] 屈星[1] GAO Yu-chen,QU Xing（School of Automation,Guangdong University of Technology,Guangzhou 510006,China）

机构地区：[1]广东工业大学自动化学院,广东广州510006

出　　处：《电脑知识与技术》2013年第6期3868-3870,共3页Computer Knowledge and Technology

摘　　要：介绍了QDPSK基本原理,提出基于FPGA的全数字QDPSK通信方案。该方案对输入序列进行加扰、串并和差分运算,得到QDPSK,然后加到载波上;在接收端载波与信号分离,再进行解差分、解扰运算,还原出输入信号,实现QDPSK全数字调制与解调。整个系统采用Verilog编程,在MaxPlusⅡ环境仿真、布局和综合,最后下载到FPGA通过示波器观察输入输出信号,实验效果良好。In this paper,the basic principle is introduced,and communication scheme is realized on FPGA.In the scheme,scram bling code is added to the input data.After serial to parallel transformation and differential operation,the output sequence is the QDPSK signal.Then,the QDPSK signal is modulated.In the receiving terminal,through a series of inverse operation,the origi nal signal is separated form obtained ODPSK signal.In whole system,programming language is Verilog,and all programs are sim ulated in MaxPlusII.At last hardware test on FPGA indicates that the system is good.

关 键 词：QDPSK FPGA 调制与解调 VERILOG 

分 类 号：TN914[电子电信—通信与信息系统;电子电信—信息与通信工程]