Physically based analytical model for plateau in gate C-V characteristics of strained silicon pMOSFET  

作　　者：王斌 张鹤鸣 胡辉勇 张玉明 周春宇 李妤晨 

机构地区：[1]Key Laboratory for Wide Band-Gap Semiconductor Materials and Devices (School of Microelectronics,Xidian University)

出　　处：《Journal of Central South University》2013年第9期2366-2371,共6页中南大学学报（英文版）

基　　金：Projects(51308040203,6139801)supported by National Ministries and Commissions,China;Projects(72105499,72104089)supported by the Fundamental Research Funds for the Central Universities,China;Project(2010JQ8008)supported by the Natural Science Basic Research Plan in Shaanxi Province of China

摘　　要：A physically based analytical model was developed to predict the performance of the plateau observed in the gate C-V characteristics of strained-Si/SiGe pMOSFET.Experimental results were used to validate this model.The extracted parameters from our model were tOX=20 nm,ND=1×1016cm 3,tSSi=13.2 nm,consistent with the experimental values.The results show that the simulation results agree with experimental data well.It is found that the plateau can be strongly affected by doping concentration,strained-Si layer thickness and mass fraction of Ge in the SiGe layer.The model has been implemented in the software for strained silicon MOSFET parameter extraction,and has great value in the design of the strained-Si/SiGe devices.A physically based analytical model was developed to predict the performance of the plateau observed in the gate C-V characteristics of strained-Si/SiGe pMOSFET.Experimental results were used to validate this model.The extracted parameters from our model were tox=20 nm,ND=1×1016 cm-3,tssi=13.2 nm,consistent with the experimental values.The results show that the simulation results agree with experimental data well.It is found that the plateau can be strongly affected by doping concentration,strained-Si layer thickness and mass fraction of Ge in the SiGe layer.The model has been implemented in the software for strained silicon MOSFET parameter extraction,and has great value in the design of the strained-Si/SiGe devices.

关 键 词：strained-Si/SiGe PMOSFET gate C-V characteristics PLATEAU doping concentration strained-Si layer thickness mass fraction of Ge 

分 类 号：TN386.1[电子电信—物理电子学]