集成计数器的新型设计方法及其Multisim仿真  

The simulation and a new design method of the integrated counter

作　　者：李立平[1] 高迎霞[1] 李文娟[1] 

机构地区：[1]石家庄铁道大学四方学院,河北石家庄051132

出　　处：《电子设计工程》2013年第20期66-69,共4页Electronic Design Engineering

摘　　要：不论是在自动化生产中,还是在高等教育《数字电子技术》的理论、实验教学中,计数器的设计尤为重要。集成计数器常见的设计方法是利用其和端来设计计数器,而本文提出了一种基于其进位输出端CO的递增计数和递减计数设计方法,并在multisim环境下对其进行了建模和仿真,且显示其计数状态,从仿真结果中可见该设计的可行性;教学实践证明该设计拓展了学生的设计思路,而且还可以大大降低实验成本,在教学经费日益紧张的情形下,缓解了教学压力。The design of counter is important whether in the automatic production or on the basic teaching of the digital electronic technology in the higher education. The integrated counter chip which common design method is the use of the and.But, this paper put forwards of a new design method of CO, including of the increment and decrement. It made a model and simulation in the multisim environment, which can display the counter state. The result of the simulation showed the design is feasible. So, it alleviated the pressure of teaching. It can reduce the cost of the test in the increasingly tense situation of the teaching. The teaching practice proved that can expand the thinking of the students in the design.

关 键 词：集成计数器 MULTISIM 仿真 教学实践 

分 类 号：TN45[电子电信—微电子学与固体电子学]