用高密度在系统可编程逻辑器件实现倍频鉴相输出电路  

A circuit for frequency multiplication and phase demodulation realized by high-density in system programmable logic device

作　　者：史晓娟[1] 李彬[1] 王小椿[1] 

机构地区：[1]西安交通大学机械学院,陕西 西安 710049

出　　处：《组合机床与自动化加工技术》2000年第11期28-29,32,共3页Modular Machine Tool & Automatic Manufacturing Technique

摘　　要：在总结以往使用的光电编码器脉冲倍频鉴相输出电路的基础上 ,介绍一种新型的利用ispLSi器件实现的数字倍频鉴相电路。这种电路不但结构简单 ,抗干扰能力强 ,而且体积小。On the base of summarizing the avaliable circuit of frequency multiplication and phase demodulation,a new type of digital circuit for frequency multiplication and phase demodulation is introduced.The circuit is designed by ispLSI device.The structure of this circuit is simple,and has strong anti noise ability.It also has small volume.

关 键 词：ISPLSI器件 倍频 鉴相 光电脉冲 控制电路 

分 类 号：TP332.1[自动化与计算机技术—计算机系统结构] TN77[自动化与计算机技术—计算机科学与技术]