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出 处:《微电子学》2013年第4期484-487,共4页Microelectronics
基 金:国家重大科技02专项资助项目(2010ZX02201-003-002)
摘 要:基于低压BCD工艺,与华润上华合作开发了1μm 600VBCD工艺平台,可以集成600V高压LDMOS和高压结终端。基于此工艺平台,设计了一种高压半桥栅驱动电路。该电路具有独立的低端和高端输入通道,内置长达1μs的死区时间,防止高低端同时导通。采用双脉冲电平位移结构完成15~615V的电平位移,同时集成过流和欠压等保护功能。高端采用新型的电平位移结构,版图面积减小12%。测试结果表明,高端浮置电平可以加到750V,高低端输出上升时间为50ns,延迟匹配为150ns,输出峰值电流大于2A,电路响应快,可靠性高。Based on existing low voltage BCD technology, a 1 /an 600 V t^D process was developed m co-operation with CSMC. In this process, 600 V LDMOS and high voltage isolation islands were integrated. A high voltage MOS gate drive circuit was designed and fabricated based on the process. With two independent inputs, the driver circuit bad 1 t^s deadtime. Over-current and under-voltage protection circuit were integrated into the eireuit. A double-pulse level shifter was used to shift level from 15 V to 615 V, and the layout of high-side was reduced by 12%. Tape out results showed that the circuit had a floating bias voltage up to 750 V, a rise time of 50 ns at both high- and low-output, a delay matching time of 150 ns, and maximum output current above 2 A. The chip had rapid response and high reliability.
分 类 号:TN432[电子电信—微电子学与固体电子学]
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