FPGA开关矩阵中基于通道结构的漏电流优化方法  

Leakage Current Optimization for FPGA Switch Matrixes Based on Routing Architecture

作　　者：王一[1,2] 杨海钢[1] 余乐[1,2] 孙嘉斌[1] 

机构地区：[1]中国科学院电子学研究所,北京100190 [2]中国科学院大学,北京100049

出　　处：《电子与信息学报》2013年第11期2784-2789,共6页Journal of Electronics & Information Technology

基　　金：国家自然科学基金(61271149)资助课题

摘　　要：从通道互连结构角度考虑,该文提出一种降低FPGA中开关矩阵漏电流的方法。根据漏电流与电路输入、输出状态有关的结论,利用连线开关盒(SWB)对信号的传输特性,将FPGA中开关矩阵的漏电优化等效在小规模的矩阵单元中实现。因为能够在有限的输出状态组合中搜寻最小漏电状态,相比仅通过电平恢复器确定SWB输出状态的方法,该算法能有效地降低漏电流,并且兼容电路级的漏电流优化方法。From the perspective of routing architecture, a leakage reduction method of switch matrixes in FPGA is proposed. Based on the conclusion of state-dependent leakage, the lowest leakage current of switch matrixes in FPGA is equivalently computed in a small size of matrix cell using the transition property of SWitch Box （SWB）. Because the presented algorithm could research the lowest leakage state in finite SWB output state combinations, rather than confirming SWB output state by level-restoring circuit, the algorithm is used for efficient reduction of leakage in switch matrixes and is compatible with the optimization of leakage at the circuit-level.

关 键 词：FPGA 互连结构 开关矩阵 开关盒 漏电流 

分 类 号：TN47[电子电信—微电子学与固体电子学]