数字下变频的FPGA实现  

Realization of digital down conversion by FPGA

作　　者：李柳[1] 彭蔓蔓[1] 

机构地区：[1]湖南大学信息科学与工程学院,湖南长沙410082

出　　处：《变频技术应用》2013年第5期69-72,共4页INVERTER TECHNOLOGIES AND APPLICATIONS

摘　　要：数字下变频（Digital Down Converteror DDC）是软件无线电的核心技术之一，本文首先介绍了数字下变频的原理，然后主要讨论了基于FPGA的数字下变频实现结构，在Xilinx公司ISE10．1开发环境下，通过编写Verilog程序和调用IP核相结合的方式研究了数字下变频的FPGA实现方法，通过FPGA芯片Virtex-5xc5vlx 110T设计实现了数字下变频器，并用Modelsim对各个模块和整个系统进行仿真，结果表明，各个模块和整个系统都能按要求工作，从而验证了FPGA实现数字下变频的正确性。Digital down converter （ Digital Down Converter or DDC ） is one of the core technologies of software radio, this paper introduces the digital down conversion principle, and then mainly discusses the implementation of DDC based on FPGA structure, in the Xilinx ISE10.1 development environment, through writing Verilog program and call the IP kernel mode combining the study of digital down conversion of the FPGA method, through the FPGA chip Virtex-5XcSvlxll0T design and implementation of digital down converter, and use Modelsim to various modules and the whole system simulation, results show, various modules and the whole system according to the requirements of the work, thus validating the FPGA implementation of digital down conversion accuracy.

关 键 词：数字下变频 IP核 数字频率合成器(DDs) FPGA 

分 类 号：TN74[电子电信—电路与系统]