高效剩余数至二进制转换器设计  

An efficient design of residue to binary converter

作　　者：吕晓兰[1] 肖明[1] 

机构地区：[1]广东石油化工学院计算机与电子信息学院,广东茂名525000

出　　处：《电子设计工程》2013年第22期129-132,共4页Electronic Design Engineering

基　　金：广东省自然科学基金重点项目(S2011020002735);广东省教育厅产学研结合项目(2011A090200088)

摘　　要：针对目前剩余数系统所处理数据动态范围较小,而且剩余数至二进制转换器的面积和延迟较大等方面的问题,基于新中国余数定理Ⅱ提出了一个高效并行转换算法,同时给出相应的电路实现。该算法采用模集合{2n-1,2n+1,22n,22n+1-1},可同时处理4个模,处理数的动态范围达到6n+1位。乘法逆元简单,电路完全由基本的加法器构成,硬件实现容易。分析实验结果表明,相比同类模集合反向转换器,文中提出的转换器的面积节省了39.4%,速度提高了47.4%。Due to the small dynamic range of data processing in the residue number system, the large area and long delay in the converter, a high efficiency and parallel conversion algorithm based on the Chinese remainder theorem II is proposed and the corresponding circuit is designed. The proposed algorithm uses the four-moduli set （2^n-1,2^n＋1,2^2n,2^2n＋1 to deal with the four moduli in paralle,The dynamic range for the moduli set is up to 6n＋1 bits .Due to the simple multiplicative inverses of the moduli set, enabling this design to achieve more speed and less hardware complexity.Experiments results indicate that the proposed converter is 39.4% more compact and 47.4% faster than others that has the same dynamic range.

关 键 词：剩余数系统 新中国余数定理 反向转换器 加法器 

分 类 号：TN47[电子电信—微电子学与固体电子学]