一种P沟VDMOS器件的研究与实现  

Development and realization of P-channel VDMOS

作　　者：蒲石[1] 郝跃[1] 

机构地区：[1]西安电子科技大学宽禁带半导体材料与器件教育部重点实验室,陕西西安710071

出　　处：《西安电子科技大学学报》2013年第6期58-61,共4页Journal of Xidian University

基　　金：国家重大科技专项资助项目(2008ZX01002-002);国家自然科学基金资助项目(61106106);中央高校基本科研业务费专项基金资助项目(K50511250008;K5051325002)

摘　　要：分析了P沟VDMOS器件结构中外延层参数与击穿电压、导通电阻之间的关系.采用Silvaco对该器件的元胞结构、物理参数和电学性能进行了模拟和优化,并设计了针对该器件的终端结构.完全依靠国内生产线流程成功开发出了P沟VDMOS制造工艺,并据此研制出了耐压值80V、输出电流14A的P沟VDMOS.测试了其静态和动态参数,均达到了设计要求.The relationship among the breakdown voltage, the epitaxial layer parameter and the on-state resistance of P-channel VDMOS has been analyzed. By using Silvaco, the structure, physical parameters and electrical properties of the P-channel VDMOS cell are simulated and optimized. Also, a terminal structure has been designed for this device. An 80 V/14 A P-channel power VDMOS has been successfully designed and manufactured totally based on the process of domestic fab, with both of its static and dynamic characteristics reaching the design criterion during the tests.

关 键 词：P沟VDMOS 外延层优化 结终端技术 

分 类 号：TN432[电子电信—微电子学与固体电子学]