基于0.5μm BCD工艺的双向SCR结构的ESD保护设计  被引量:2

ESD protection design of DDSCR structure based on the 0.5μm BCD process

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作  者:梁海莲[1,2] 董树荣[2] 顾晓峰 李明亮[2] 韩雁[2] 

机构地区:[1]江南大学轻工过程先进控制教育部重点实验室,江苏无锡214122 [2]浙江大学微电子与光电子研究所,浙江杭州310027

出  处:《浙江大学学报(工学版)》2013年第11期2046-2050,共5页Journal of Zhejiang University:Engineering Science

基  金:国家自然科学基金资助项目(11074280;61171038;61150110485);江苏高校优势学科建设工程资助项目;中央高校基本科研业务费专项资金(JUSRP51323B;JUDCF13032)

摘  要:针对双向可控硅(DDSCR)在特征尺寸不断缩小的集成电路中,难以达到窄小静电放电(ESD)设计窗口的ESD防护需求,设计一种PMOS内嵌型浮栅DDSCR(GFDDSCR)ESD保护器件,并基于0.5μm Bipolar-CMOSDMOS工艺进行制备.利用传输线脉冲测试研究不同关键尺寸的GFDDSCR的ESD特性及单位面积ESD防护能力,分析器件ESD特性随关键尺寸变化的规律,得到优化的GFDDSCR的结构参数.结果表明,与DDSCR的改进型结构(IBDSCR)相比,优化的GFDDSCR触发电压下降了27%,电压回滞幅度减小了53%,维持电压和失效电流基本不变,能够满足微纳米级集成电路窄小ESD设计窗口的需求.Since the dual directional silicon controlled rectifier (DDSCR) can not meet the requirement of the narrow electrostatic discharge (ESD) design window in integrated circuits with progressively decrea- sing feature sizes, an ESD protection clevice of PMOS-embedded gate-floating DDSCR (GFDDSCR) was designed and fabricated based on the 0.5 gm Bipolar-CMOS-DMOS process. The ESD characteristics of GFDDSCR devices with different key dimensions were studied by transmission line pulse testing, and their unit area ESD protection ability was calculated. The structure parameters of GFDDSCR were optimized by investigating the effects of key dimensions on the ESD characteristics. Results show that, compared with the improved bi-directional silicon controlled rectifier (IBDSCR), the optimized GFDDSCR has a small change in the holding voltage and the failure current, a lower trigger voltage decreased by about 27%, and a narrower voltage snapback margin decreased by about 53%. As a result, the optimized GFDDSCR can meet the requirement of the narrow ESD design window in micro-nano scaled integrated circuits.

关 键 词:静电放电 双向可控硅 触发电压 维持电压 失效电流 

分 类 号:TN335[电子电信—物理电子学]

 

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