基于寄存器状态的低功耗时钟树设计  

Low power clock tree design based on pattern of registers

作　　者：张晓芸[1] 高玉竹[1] 

机构地区：[1]同济大学电子科学与技术系,上海201804

出　　处：《电子测量技术》2013年第11期1-3,共3页Electronic Measurement Technology

摘　　要：功耗对芯片来说是一项重要的技术指标,现代IC设计的目标之一就是降低功耗。门控时钟技术可以有效地降低芯片动态功耗,因此构建时钟树网络显得尤为重要。以降低门控信号翻转次数为目标,提出一种基于寄存器状态的时钟树网络构造方法,将节点差异作为构造时钟树的关键因素,并用C语言建模实现,将此算法与传统算法产生的门控信号翻转次数进行对比。结果表明,该算法可有效降低门控信号翻转次数,从而降低功耗,是一种有效的低功耗时钟树设计算法。Power is an important technical target of chip,and lowing power is one of the goals of modern IC design.Since gating clock can effectively reduce the dynamic power consumption on chip,it is particularly important to build the clock tree network.In order to reduce the transitions of control signal,an algorithm to build clock tree network based on the state of registers is presented,which makes nodes difference as a key factor,and uses C language to model.This algorithm is compared with original one in the item of control signal＇s transitions.The result indicates,it can effectively reduce transitions of control signal,and therefore reduce power.So it is an effective way to design low power clock tree.

关 键 词：时钟树 低功耗 节点差异 门控信号 

分 类 号：TN492[电子电信—微电子学与固体电子学]