高速数据采集卡的信号完整性分析  

Signal Integrity Analysis of High-speed Data Acquisition Card

作　　者：吴健[1] 孔德升[2] 

机构地区：[1]天津理工大学计算机与通信工程学院,通信器件教育部工程研究中心,300384 [2]天津理工大学薄膜电子与通信器件天津市重点实验室,300384

出　　处：《仪表技术与传感器》2013年第12期93-96,共4页Instrument Technique and Sensor

摘　　要：根据信号完整性理论,借助IBIS模型和Cadence软件,设计了一块以AD9254+cycloneII系列EP2C5Q208C8N为核心的高速数据采集卡,在设计过程中解决了反射和串扰的问题,找到了使系统时序正常工作的线长约束条件。文中仿真及实测结果均证明设计出的高速数据采集卡已被有效地降低反射和串扰噪声,时序问题也处理得当,保证了实际系统的正常工作。An high-speed data acquisition card of AD9254 ＋ cyclone 1] -EP2C5Q208C8N as the core was designed with IBIS model and Cadence software based on the theory of signal integrity. In the design process, the reflection and crosstalk problem ~as solved, the line length constraint condition of system timing normal work was found. Finally, this high-speed data acquisition card is reduced reflection and crosstalk noise, timing issue is properly handled to ensure the normal work of the actual system by the simu- lation and experimental results.

关 键 词：数据采集 PCB CADENCE IBIS 信号完整性 

分 类 号：TN41[电子电信—微电子学与固体电子学]