一种基于混合存储的高效、可扩展细粒度缓存管理研究  

Research about Efficient and Scalable Hybrid Memories at Fine-granularity Cache Management

作　　者：姜国松[1] 

机构地区：[1]中国传媒大学信息与通信工程博士后流动站

出　　处：《小型微型计算机系统》2014年第2期334-338,共5页Journal of Chinese Computer Systems

基　　金：湖北省自然科学基金项目(2011CDC078)资助

摘　　要：混合型主存储器也是DRAM构成,并把混合型主存储器作为高速缓存使用,因此可以扩展Non-volatile存储器,相比传统型的主存储器,混合型主存储器可以提供更大的存储能力.然而,对于混合型主存储器,要使其具有高性能和高可扩展性,一个关键的挑战是以一种细粒度的方式有效地管理缓存在DRAM中的数据的元数据(如Tag).基于此观察:根据DRAM高速缓存行的局部性,在芯片外相同的高速缓存行中存储数据和数据的元数据,本文通过使用一个小缓冲区缓存最近被访问的片内缓存行来减少细粒度DRAM高速缓存的开销.基于细粒度DRAM高速缓存使用的灵活性和效率,还开发了一种自适应的策略,可以选择数据迁移到DRAM高速缓时的最佳迁移粒度.在配置了512MB DRAM的混合存储系统中,使用8KB的片上高速缓存,相比传统的8MB SRAM元数据存储,即便没有考虑大SRAM元数据存储的能耗开销,实现了不超过6%的性能提升,节约了18%左右的能效.Hybrid main memories are composed of DRAM which can provide much larger storage capacity than traditional main mem- ories used as a cache to scalable non-volatile memories, such as phase-change memory. However, for Hybrid main memories with high performance and scalability, a key challenge is to effectively manage the metadata { e. g. , tags } for data cached in DRAM in a fine- granularity. Based on this observation： storing metadata on off-chip cache line in the same row as their data corresponding to the metadata exploits DRAM row buffer locality, this paper reduce the overhead of fine-grained DRAM cache by using a small buffer cache chip cache line has recently been accessed. We also develop an adaptive policy to choose the best granularity when migrating data into DRAM. On a hybrid memory with a 512MB DRAM cache, our proposal using an 8KB on-chip buffer can achieve within 6 % of the performance of, and 18 % better energy efficiency than, a conventional 8MB SRAM metadata store, even when the energy overhead due to large SRAM metadata storage is not considered.

关 键 词：高速缓存 标签-存储 非易失性存储器 混合型主存 

分 类 号：TP311[自动化与计算机技术—计算机软件与理论]