静态存储器多比特翻转的概率失效模型  

Failure Probability Modeling for SRAM Suffering Multiple-bit Upsets

作　　者：周婉婷[1] 叶世旺[1] 李磊[1] 

机构地区：[1]电子科技大学电子科学技术研究院,四川成都611731

出　　处：《微电子学与计算机》2014年第2期54-56,61,共4页Microelectronics & Computer

基　　金：国家自然科学基金项目(61101033)

摘　　要：针对静态存储器出现的多比特翻转,提出了一种软错误失效模型.以"生日重合"理论作为多比特失效统计的基础,将常用加固方式纠错码和周期刷新作为分析条件得到累积错误和非累积错误的概率失效模型.前者为相同容量存储器的不同字长结构提供了失效概率的数值分析,并为实际测试结果提供了一个理论参考;后者量化了刷新周期的选取对于误码率改善程度.仿真结果显示90nm体硅工艺下,累积错误模型与低能量质子测试结果相符合;非累积错误模型分析的刷新周期略高于实际结果.The reliability of SRAMs that exposed to radiation has been studied with the aims of driving predictive model based on suffering multiple bit upsets. A method based on simple birthday statistics used to predict the cumulative probability of SRAMs suffering soft errors. An improved non-cumulative probability function was proposed to evaluate the periodic memory scrubbing technology which used to improve the effective BER over physical BERs. The predictive model is in good agreement with test results for SRAM processed using 90 nm bulk process technology under proton test.

关 键 词：多比特翻转 静态存储器 可靠性 刷新 

分 类 号：TP302[自动化与计算机技术—计算机系统结构]