RF LDMOS器件与高效率功率放大器设计  

Design of RF LDMOS and High Efficiency Power Amplifier

作　　者：郑云飞[1] 王一哲[1] 张小苗[1] 罗玲[1] 曾大杰[2] 宋贺伦[2] 

机构地区：[1]西安电子科技大学天线与微波国家重点实验室,西安710071 [2]中科院苏州纳米技术与纳米仿生研究所,江苏苏州215123

出　　处：《固体电子学研究与进展》2014年第1期46-49,共4页Research & Progress of SSE

摘　　要：为满足人们高速通信的需求，多载波、宽带已经成为新的发展方向，这对功率器件和放大器需要提出新的要求。文中基于改进后CMOS工艺模块。针对GSM基站频段，通过对RFLDMOS版图的优化，制备了实际的RFILDMOs芯片。使用负载牵引系统测出器件在940MHz时P3db压缩点输出功率52．6dBm，效率72％。并使用负载牵引系统测量出的数据制作了一款工作于920～960MHz的高效率功率放大器，通过对匹配电路地优化，p1db压缩点达到52．7dBm，P1db压缩点效率为65％，在功率回退8dB时效率为32．8％，线性增益18dB。With the development of the high speed communications, the characteristics inclu- ding multi-carrier, broadband have become new directions, so power devices and amplifiers need to be improved with the trend. Based on the improved CMOS process modules, this paper propo ses an actual RF LDMOS chip by optimizing its layout. The output power and efficiency of the device at P3db compression point at 940 MHz are 52. 6 dBm and 72%respectively, which are measured by the load-pull system. A 920 ~ 960 MHz high-efficiency power amplifier is made based on this measured data. By optimizing the matching circuits, the output power and the effi- ciency at P1dB compression point reach 52.7 dBm, and 65% separately. The linear gain and effi- ciency of the amplifier at 8 dB backoff point from its saturated output power （Psat） are 18 dB and 32.8 % respectively.

关 键 词：功率器件 漏极效率 互补金属氧化物半导体工艺 功率放大器 负载牵引系统 

分 类 号：TN385[电子电信—物理电子学] TN722.7