两种利用FPGA产生m序列的算法分析  

Two algorithm analysis of m sequence produced by FPGA

作　　者：陈天成[1] 王艳红[1] 

机构地区：[1]烟台大学光电信息科学技术学院,山东烟台264000

出　　处：《现代电子技术》2014年第5期58-60,共3页Modern Electronics Technique

摘　　要：为了产生性能良好且节省硬件资源的m序列,分别提出了基于现场可编程门阵列(FPGA)的逻辑法和核调用法两种算法,并详细介绍了两种算法的实现步骤。通过在Xilinx公司的NEXYS3开发板上进行设计和编程,对两种算法的可行性进行了检测;并结合ISE编程软件的仿真功能和Matlab对算法的自相关性、硬件占用率和实现难度等性能进行了分析。最终,了解到核调用法在m序列产生中的优越性。In order to produce m sequence with high performance and resource-saving,two algorithms based on FPGA,which respectively named as Logic Description and IP Core Transfer,are provided,and the implementation steps of the two algorithms are introduced. NEXYS3 developing platform from Xilinx Company is used to program and design. The feasibility of the two algo-rithm os tested. Combine with the emulation facility of ISE program,the autocorrelation,hardware occupancy rate and implemen-tation difficulty of the Matlab are analyzed. Finally the advantages of IP Core Transfer in m sequence are comprehended.

关 键 词：M序列 IP核 

分 类 号：TN919-34[电子电信—通信与信息系统]