一种基于多核嵌入式系统的TD-LTE同步校正方法  

Approach of synchronization correction in TD-LTE based on multicore embedded system

作　　者：郭丽强[1] 陈发堂[1] 

机构地区：[1]重庆邮电大学重庆市移动通信技术重点实验室,重庆400065

出　　处：《电子技术应用》2014年第4期70-72,76,共4页Application of Electronic Technique

基　　金：国家科技重大专项:TD-LTE射频一致性测试仪表开发(2011ZX03001-002);长江学者和创新团队发展计划资助(IRT1299);重庆市科委重点实验室专项经费

摘　　要：针对TD-LTE系统中同步性错误随机发生的问题,提出了一种通过ARM+DSP+FPGA平台的嵌入式系统实现帧号和原语的同步校正方法。该方法基于TD-LTE射频一致性测试仪表硬件平台,通过该嵌入式系统中ARM、DSP、FPGA间的协调工作,由GPMC模块通过帧号和原语两方面对系统同步性进行校正。在TD-LTE射频一致性测试仪表硬件平台中进行了验证,结果表明,该方法在实现帧号与子帧号同步校正的基础上明显提高了TD-LTE系统通信的稳定性。For the problem that synchronization errors occur randomly in the TD-LTE system, an approach based on the ARM ＋ DSP＋FPGA embedded systems to achieve frame number and primitive synchronization is proposed. This method is based on TD- LTE RF Conformance Test System hardware platform, where the CPU of ARM, DSP, and FPGA work coordinately to do the syn- chronization correction from two aspects including frame number and primitive by GPMC. The method integrates aspects of TD-LTE system characteristics, and it has been tested in the hardware platform. The result shows this method achieves the synchronization correction of frame number and primitive as well as improves the stability of communication in TD-LTE.

关 键 词：LTE 嵌入式 ARM+DSP+FPGA 同步 校正 

分 类 号：TN929.5[电子电信—通信与信息系统]