基于FPGA的多路竞赛抢答器设计  

Design of Multi-channel Competition Responders Based on FPGA

作　　者：冀云[1] 

机构地区：[1]重庆电子工程职业学院应用电子学院,重庆401331

出　　处：《重庆工商大学学报（自然科学版）》2014年第3期62-67,共6页Journal of Chongqing Technology and Business University:Natural Science Edition

摘　　要：基于ISE软件开发环境,运用VHDL硬件描述语言,设计了一款4路竞赛抢答器,给出了抢答器系统的系统功能模块;对设计工程进行了综合、编译、仿真,并下载到FPGA芯片xc3s700a-5fg484进行测试;结果表明设计能实现系统预期的功能。Based on ISE software development environment, by using VHDL hardware description this paper designs a kind of four-channel competition responder, gives systematic function module of the language, responder system, conducts synthesizing, compiling and simulating implementation on designed project, and tests the functions by downloading the module to FPGA chip xc3s700a-Sfg484. The results show that this design can realize the expected functions of the design.

关 键 词：竞赛抢答器 VHDL 仿真波形 硬件测试 

分 类 号：TN421[电子电信—微电子学与固体电子学]