多核处理器事务级模型多视图协同验证环境  

Multi-core transaction level modeling and multi-view co-verification environment

作　　者：王俊[1] 刘磊[1] 张龙[1] 李思昆[1] 

机构地区：[1]国防科学技术大学高性能计算国家重点实验室,湖南长沙410073

出　　处：《计算机工程与科学》2014年第5期821-827,共7页Computer Engineering & Science

基　　金：国家自然科学基金资助项目(61133007)

摘　　要：随着集成电路工艺持续高速发展,片上处理器核数目呈现指数增长规律,设计复杂程度不断增长,对处理器验证提出了严峻的挑战,至今仍缺乏有效的工具手段。提出了一种多核处理器事务级模型的多视图协同验证方法,将模拟验证、形式验证、应用验证三种不同验证视图,采用统一平台集成为一体化验证环境。从而可在一体化验证环境中,充分发挥多种验证方法综合应用的优势,协同高效完成多核处理器事务级模型验证任务。基于SoCLib事务级建模仿真平台实现了一个具有良好可扩展性的多视图协同验证环境MVIE。初步应用实验结果表明,多视图协同验证和传统单一视图验证方法相比,在模型验证的方便性、完备性、高效性以及模型数据一致性维护等方面,具有明显的优势。With the continuous rapid development of integrated circuit technology, the exponential growing of the number of on-chip processor cores, the growing complexity of the design, the processor verification faces challenges. However, so far effective tools are still lacked. The paper proposes a muhi-view co-verification method regarding transaction-level modeling of multi-core processors. Using a unified platform, the muhi-view co-verification environment contains simulation verification, formal ver- ification and application verification as three different views. Hence, multi-core processors transaction- level model validation task can be done in this integrated verification environment, owning multiple methods advantages of three different views. Based on a transaction-level modeling and simulation plat- form, named SoCLib, we implement a good scalable multi-view co-verification environment called MVIE. Experimental results show that, compared with traditional single view verification, the proposed multi-view co-verification method has obvious advantages in transaction verification, especially in terms of convenience, completeness, efficiency, and model data consistency maintenance, etc.

关 键 词：多核处理器 事务级模型 多视图 协同验证 SoCLib平台 

分 类 号：TP311.52[自动化与计算机技术—计算机软件与理论]