雷达目标干扰调制信号的FPGA实现  

FPGA Implementation of Radar Target Jamming Modulation Signal

作　　者：梁清龙 王建业[1] 岳鸿鹏[1] 

机构地区：[1]空军工程大学防空反导学院,西安710051

出　　处：《计算机测量与控制》2014年第6期1912-1914,共3页Computer Measurement &Control

摘　　要：用VHDL语言在QuartusⅡ环境下对雷达干扰调制信号的产生进行设计;将FPGA实现的功能分为数字噪声模块、调制波形模块和角度包络模块,详细给出设计过程;经过仿真和硬件测试,实现了雷达目标干扰调制信号的输出;研究表明该系统方便控制,容易修改,并且能移植到其它目标模拟器,对干扰调制信号的设计有一定的借鉴意义。Radar target jamming modulation signal is designed by VHDL language under the environment of Quartus Ⅱ. The function of FPGA is divided into three units with the detailed design process, including digital noise unit, modulation waveform unit, angle envelope u- nit. Through the simulation and hardware test, radar target jamming modulation signal is generated successfully, research shows that t^e system is convenient to control, easy to modify, and can he transplanted to other target simulator, it also has certain reference significance to the design of the jamming modulation signal.

关 键 词：VHDL 干扰调制 数字噪声 调制波形 角度包络 

分 类 号：TN972[电子电信—信号与信息处理]