共享多端口数据Cache结构:SMPDCA  

Shared Multi-Ported Data Cache Architecture:SMPDCA

作　　者：黄光奇[1] 李子木[2] 周兴铭[1] 窦勇[1] 

机构地区：[1]国防科学技术大学计算机学院重点实验室,长沙410073 [2]清华大学中国教育和科研计算机网络中心,北京100084

出　　处：《计算机学报》2001年第12期1318-1323,共6页Chinese Journal of Computers

基　　金：国家自然科学基金 ( 6 99330 30 )资助

摘　　要：随着半导体工艺技术的飞速发展 ,单芯片多处理器 (Single- Chip Multiprocessor,SCMP)结构将是一条提高处理器性能的有效途径 .该文在分析 SCMP结构的特点的基础上 ,提出了 SCMP的一种结构实现 :共享多端口数据 Cache结构 (Shared Multi- Ported Data Cache Architecture,SMPDCA) .SMPDCA结构具有三个突出的优点 :最小的通信延迟、没有 Cache一致性维护开销和数据 Cache命中率提高 .模拟结果表明 ,与数据 Cache私有的结构相比 ,SMPDCA结构的突出优点使得应用程序的性能得到了明显的提高 ,特别是对于改善处理器之间的通信与交互比较多的应用程序的性能具有最为明显的效果 .We present the Shared Multi-Ported Data Cache Architecture (SMPDCA) on the basis of analyzing the characteristics of the SCMP architecture. The key idea of SMPDCA architecture is many processors sharing one multi-ported primary data cache which has many parallel request ports through a crossbar on one chip. This paper presents the architecture model of SMPDCA, and discusses its three key techniques: multi-ported data cache, private instruction cache and shared data cache, pipelined data cache. SMPDCA architecture has three outstanding excellences: supplying shortest inter-processor communication latency using the shared L1 data cache and no cost to maintain cache coherence and hit rate of data cache increases. This paper made performance simulations of SMPDCA by using RSIM simulator and six parallel applications on SUN Ultra-I 170. Simulation results show that performance of SMPDCA architecture improves about 10%-30% averagely than another architecture whose data cache is private, especially the best is about 50% for the parallel applications which has many inter-processor communications.

关 键 词：共享多端口数据Cache 执行时间 SMPDCA 单芯片多处理器 

分 类 号：TP332[自动化与计算机技术—计算机系统结构]