数字系统的EDA方法  

EDA Method of the Digital Logic Circuit

作　　者：钱培怡[1] 于德泳[1] 

机构地区：[1]抚顺石油学院信息工程分院,辽宁抚顺113001

出　　处：《抚顺石油学院学报》2002年第1期55-57,60,共4页Journal of Fushun Petroleum Institute

摘　　要：现代的电子电路或系统都离不开计算机辅助设计 (CAD -ComputerAidedDesign)工具的帮助 ,尤其是数字系统的描述、仿真及综合都离不开电子设计自动化技术 (EDA -ElectronicDesignAutomation)工具软件的支持。当前流行的各种EDA软件平台 ,支持VHDL语言输入功能 ,应用VHDL硬件描述语言 ,对系统采用top -down的设计方法。首先对系统功能在顶层模块上进行行为描述。然后对低层各模块进行行为描述、结构描述或混合描述。最后通过仿真及逻辑综合优化工具编译下载到可编程器件上 ,完成全部设计或综合过程。论述了高级语言VHDL的行为模块描述和结构模块描述 。Modern electronic circuit or system design can not be without aid of the CAD(Computer Aided Design), particularly, the description, simulation, synthesis, all can not be without the support of EDA (Electronic Design Automation ) tools. The popular platforms of EDA software at the presents support input function of VHDL language, and a top-down design method has been adopted with VHDL, it describes the behavior of the system function on the up model first, then describes the behavior , structure or both on the low layer of the system. Finally ,by using simulation and logic synthesis optimization tools the files will be compiled and down loaded to the programmable device to complete the all design and synthesis process. This paper discussed the methods of behavior and structure model description with high language VHDL and presented a simple example to introduce the mix description for model.

关 键 词：CAD VHDL 混合模块 电子电路 电子系统 数字系统 EDA 

分 类 号：TN7[电子电信—电路与系统] TP391.7[自动化与计算机技术—计算机应用技术]