一种用于车载以太网PHY的高速D/A转换器设计  

Design of High Speed D/A Converter for Automotive Ethernet PHY

作　　者：赵玉彬 祝永新 田犁[1] 汪辉[1] 封松林[1] 李海华[4] ZHAO Yubin;ZHU Yongxin;TIAN Li;WANG Hui;FENG Songlin;LI Haihua(Shanghai Advanced Research Insitute ,Chinese Academy of Sciences,Shanghai,201210,CHN;University of Chinese Academy of Sciences,Beijing ,100049,CHN;School of Information Science and Technology,ShanghaiTech University,Shanghai,201210,CHN;School of Electronic Information and Electrical Engineering,Shanghai Jiao Tong University,Shanghai,200240,CHN)

机构地区：[1]中国科学院上海高等研究院,上海201210 [2]中国科学院大学,北京100049 [3]上海科技大学信息科学与技术学院,上海201210 [4]上海交通大学电子信息与电气工程学院,上海200240

出　　处：《固体电子学研究与进展》2018年第6期439-445,共7页Research & Progress of SSE

基　　金：国家重点研发计划资助项目(2017YFA0206104);上海市科学技术委员会科研计划项目(16511108701)

摘　　要：为了解决传统电流源的无杂散动态范围(SFDR)在高频时随输出阻抗迅速降低而降低的问题,采用旁支小电流的共源共栅结构电流源,提高了整体数模转换器(DAC)电路的动态性能。电流源阵列的版图设计中考虑到电流源相互的匹配性,采用了"W形"电流源阵列布局方式,有效降低了由梯度误差引起的不匹配。该DAC采用全6bit温度计译码的电流舵结构,输出满摆幅电流是40mA。该DAC基于SMIC 0.13μm CMOS工艺实现,DAC部分电路的面积为0.35mm×0.36mm,模拟电路采用3.3V电源,数字电路采用1.2V电源。电路流片测试结果表明:在信号频率为30MHz、采样频率为1GHz的情况下,无杂散动态范围(SFDR)测试结果为46.60dB。In order to solve the problem that the traditional current source SFDR decreased with the rapid decrease of output impedance at high frequency,the proposed cascode current source was used by passing small current,which improved the dynamic performance of overall DAC.Considering the mutual matching of the current sources in the layout design,a W-type current array layout was taken,which effectively reduced the mismatch caused by gradient error. The proposed DAC employed a full 6-bit thermometer decoder current steering structure with the full swing output current of 40mA.Based on the SMIC 0.13um CMOS process,the DAC was 0.35mm×0.36mm in size with 3.3V power supply for analog circuits and 1.2V power supply for digital circuits.The test results of tape-out circuit show that the SFDR is 46.60dB at 30MHz input signal frequency and 1GHz sampling frequency.

关 键 词：物理层 数模转换器 互补金属氧化物半导体 电流舵 无杂散动态范围 

分 类 号：TN432[电子电信—微电子学与固体电子学]