宽带电力线载波通信系统的FFT实现  

Implementation of FFT for broadband power line communication system

作　　者：迟海明 陈翔 周春良 唐晓柯 Chi Haiming;Chen Xiang;Zhou Chunliang;Tang Xiaoke(State Grid Key Laboratory of Power Industrial Chip Design and Analysis Technology,Beijing Smart-Chip Microelectronics Technology Co.,Ltd.,Beijing 100192,China;Beijing Engineering Research Center of High-Reliability IC with Power Industrial Grade,Belling Smart-Chip Microelectronics Technology Co.,Ltd.,Beiiing 100192 ,China)

机构地区：[1]北京智芯微电子科技有限公司国家电网公司重点实验室电力芯片设计分析实验室,北京100192 [2]北京智芯微电子科技有限公司北京市电力高可靠性集成电路设计工程技术研究中心,北京100192

出　　处：《电子测量技术》2018年第22期5-9,共5页Electronic Measurement Technology

基　　金：国网总部科技项目(546816170003)资助

摘　　要：在分析了基4 FFT算法的基础上,提出了迭代计算1 024点基4 FFT的一种数字逻辑实现结构。蝶形计算单元使用共享寄存器和共享复数乘法器来减少面积,同时通过流水线设计降低延时。设计了一种存储结构通过存储器分组、交叉连接及特定的访问时序实现两路蝶形计算单元无等待访问。块浮点单元根据每次迭代计算得到的最大值实时压缩数据,提高了数据处理的动态范围。旋转因子单元通过正弦对称性,将旋转因子存储空间减小75%。通过MATLAB仿真,定点FFT的输出信噪比达50.4 dB。相应的RTL实现通过Systemverilog得以验证。采用SMIC 40 nm LOGIC0040LL标准单元库综合,在PVT为ss/0.99 V/-40℃下,最高时钟为310.5 MHz,吞吐量为2.11 Gbps,面积为161.36 kGE,功耗为10.14 mW。Based on the analysis of the Radix-4 FFT algorithm, an iterative architecture of implementation of the 1 024 points Radix-4 FFT is proposed. Butterfly unit is fully pipelined to reduce delay, and with resource sharing, the area is low. A memory structure which is designed to be zero-wait accessing by the two parallel butterfly units is arranged by groups and connected through a flexible crossbar. The dynamic range of the butterfly operation is achieved higher by means of real-time data compressing. The twiddle factor storage is 75% lower than normal by the symmetric of sine. To verify the correctness of the fix-point C implementation of the 1 024 points Radix-4 FFT, carrier-to-noise ratio(CNR) is investigated by using MATLAB simulation and the result is 50.4 dB. The RTL implementation is proved to be bit-match with the C model through the systemverilog verification. Design synthesis with the ASIC library of SMIC 40 nm LOGIC0040 LL standard cell is accomplished by DC. The result shows that the highest clock frequency is 310.5 MHz with throughput up to 2.11 Gbps at PVT ss/0.99 V/-40 ℃ meanwhile the area is 161.36 kGE and the power consumption is 10.14 mW.

关 键 词：宽带电力线载波通信 快速傅立叶变换 迭代 蝶形运算 块浮点 信噪比 

分 类 号：TN913.6[电子电信—通信与信息系统] TN79.1[电子电信—信息与通信工程]