CMOS四象限乘法器的精确设计  

A Precision Design of CMOS Four Quadrant Multiplier

作　　者：林长贵[1] 郭砺志 罗晋生[1] 

机构地区：[1]西安交通大学电子工程系

出　　处：《微电子学》1991年第2期8-11,共4页Microelectronics

摘　　要：本文提出了一种新型CMOS四象限乘法器,它基于MOSFET的电流-电压平方律模型,采用电压比例电路及四管单元乘法电路使乘法器能精确完成乘法运算。该乘法器的电路结构简单、精确度高及实现四象限相乘的特点,使之在CMOS通信集成电路,信号处理及运算电子系统中有广阔的应用前景。文中对电路的结构进行了详细分析和设计,并给出了HSPICE-Ⅱ模拟结果。A new CMOS four quadrant multiplier based on the MOSFET current-voltage sqa-re law is proposed. The multiplier uses a voltage ratio circuit and a four-transistor cell multiplying circuit which enable its precision multiplying operation. The simple circuit structure, high precision operation and four quadrant multiplying capability features make the multiplier widely applicable to CMOS communication ICs, signal processing equipments and electronic computing systems. A detailed analysis on the design and the circuit structure is given and the simulated results using HSPICE-II is presented.

关 键 词：CMOS 乘法器 HSPICE模拟 集成电路 

分 类 号：TN432[电子电信—微电子学与固体电子学]