双栅掺杂隔离肖特基MOSFET的解析模型  

Analytical Model of Double-gate Dopantsegregated Schottky MOSFETs

作　　者：王睿[1] 赵青云[1] 朱兆旻[1] 顾晓峰[1] 

机构地区：[1]轻工过程先进控制教育部重点实验室,江南大学电子工程系,江苏无锡214122

出　　处：《固体电子学研究与进展》2014年第4期303-308,共6页Research & Progress of SSE

基　　金：专用集成电路与系统国家重点实验室开放研究课题基金(11KF003);中央高校基本科研业务费专项资金(JUSRP51323B;JUSRP211A37);江苏高校优势学科建设工程(PAPD);江苏省六大人才高峰资助项目(DZXX-053)

摘　　要：通过考虑肖特基势垒降低效应求解三段连续的二维泊松方程,建立了双栅掺杂隔离肖特基MOSFET亚阈值区全沟道连续的电势模型。在该电势模型的基础上,推导了阈值电压模型和漏致势垒降低效应的表达式;研究了掺杂隔离区域不同掺杂浓度下的沟道电势分布,分析了沟道长度和厚度对短沟道效应的影响。结果表明,掺杂隔离区域能改善肖特基MOSFET的电学特性;对于短沟道双栅掺杂隔离肖特基MOSFET,适当减小沟道宽度能有效抑制短沟道效应。An analytical subthreshold full-channel continuous potential model of double-gate （DG） dopant-segregated Schottky （DSS） MOSFET has been established by solving three-segment continuous two-dimensional Possion＇s equation with considering Schottky harrier lowering effect. Analytical expressions for threshold voltage and drain-induced harrier lowering effect are derived based on the potential model. The channel potential distributions with different doping concentrations in the dopant-segregated region are investigated. Effects of channel length and channel thickness on the short channel effects are also analyzed. Results indicate that the dopantsegregated region can improve the electrical performance of Schottky harrier MOSFETs. For short channel DG DSS MOSFETs, the short channel effects can be effectively suppressed by ap- propriately decreasing the channel thickness.

关 键 词：肖特基源漏 掺杂隔离 双栅金属氧化物半导体场效应管 阈值电压 短沟道效应 

分 类 号：TN386.1[电子电信—物理电子学]